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| DS1707/DS1708 DS1707/DS1708 3.3 and 5.0 Volt MicroMonitor FEATURES PIN ASSIGNMENT PBRST 1 2 3 4 8 7 6 5 RST RST NC NMI * Holds sients microprocessor in check during power tranrestarts microprocessor after power VCC GND IN * Automatically failure * Monitors pushbutton for external override * Accurate 5%, 10% or 20% resets for 3.3 systems and 5% or 10% resets for 5.0 volt systems PBRST VCC GND IN 8-PIN DIP (300 MIL) 1 2 3 4 8 7 6 5 RST RST NC NMI * Eliminates the need for discrete components * 20% tolerance compatible with 3.0 volt systems * Pin compatible with the MAXIM MAX707/MAX708 in 8-pin DIP and 8-pin SOIC packages 8-PIN SOIC (150 MIL) PBRST VCC GND IN 1 2 3 4 8 7 6 5 RST RST NC NMI * 8-pin DIP, 8-pin SOIC and 8-pin -SOP packages available * Industrial temperature range -40C to +85C 8-PIN -SOP (118 MIL) See Mech. Drawings Section DS1707 and DS1708_/R/S/T PIN DESCRIPTION PBRST VCC GND IN NMI NC RST RST - - - - - - - - Pushbutton Reset Input Power Supply Ground Input Non-maskable Interrupt No Connect Active Low Reset Output Active High Reset Output DESCRIPTION The DS1707/DS1708 3.3 or 5.0 Volt MicroMonitor monitors three vital conditions for a microprocessor: power supply, voltage sense, and external override. A precision temperature-compensated reference and comparator circuit monitors the status of VCC at the device and at an upstream point for maximum protection. When the sense input detects an out-of-tolerance condition a non-maskable interrupt is generated. As the voltage at the device degrades an internal power fail signal is generated which forces the reset to an active state. When VCC returns to an in-tolerance condition, the reset signal is kept in the active state for a minimum of 130 ms to allow the power supply and processor to stabilize. ECopyright 1995 by Dallas Semiconductor Corporation. All Rights Reserved. For important information regarding patents and other intellectual property rights, please refer to Dallas Semiconductor data books. 010996 1/9 DS1707/DS1708 The third function the DS1707/DS1708 performs is pushbutton reset control. The DS1707/DS1708 debounces the pushbutton input and guarantees an active reset pulse width of 130 ms minimum. OPERATION Power Monitor The DS1707/DS1708 detects out-of-tolerance power supply conditions and warns a processor-based system of impending power failure. When VCC falls below the minimum VCC tolerance, a comparator outputs the RST and RST signals. RST and RST are excellent control signals for a microprocessor, as processing is stopped at the last possible moment of valid VCC. On power-up, RST and RST are kept active for a minimum of 130 ms to allow the power supply and processor to stabilize. resistor voltage divider network (Figure 5) is used to interface with high voltage signals. This sense point may be derived from a regulated supply or from a higher DC voltage level closer to the main system power input. Since the IN trip point VTP is 1.25 volts, the proper values for R1 and R2 can be determined by the equation as shown in Figure 5. Proper operation of the DS1707/DS1708 requires that the voltage at the IN pin be limited to VCC. Therefore, the maximum allowable voltage at the supply being monitored (VMAX) can also be derived as shown in Figure 5. A simple approach to solving the equation is to select a value for R2 high enough to keep power consumption low, and solve for R1. The flexibility of the IN input pin allows for detection of power loss at the earliest point in a power supply system, maximizing the amount of time for system shut- down between NMI and RST/RST. When the supply being monitored decays to the voltage sense point, the DS1707/DS1708 pulses the NMI output to the active state for a minimum 200 s. The NMI power fail detection circuitry also has built-in hysteresis of 100 V. The supply must be below the voltage sense point for approximately 5 s before a low NMI will be generated. In this way, power supply noise is removed from the monitoring function, preventing false interrupts. During a power-up, any detected IN pin levels below VTP by the comparator are disabled from generating an interrupt until VCC rises to VCCTP. As a result, any potential NMI pulse will not be initiated until VCC reaches VCCTP. Connecting NMI to PBRST would allow the non-maskable interrupt to generate an automatic reset when an out-of-tolerance condition occurred in a monitored supply. An example is shown in Figure 3. Pushbutton Reset The DS1707/DS1708 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such that RST and RST signals of at least 130 ms minimum will be generated. The 130 ms delay commences as the pushbutton reset input is released from the low level. The pushbutton can be initiated by connecting the NMI output to the PBRST input as shown in Figure 3. Non-Maskable Interrupt The DS1707/DS1708 generates a non-maskable interrupt (NMI) for early warning of a power failure. A precision comparator monitors the voltage level at the IN pin relative to an on-chip reference generated by an internal band gap. The IN pin is a high impedance input allowing for a user-defined sense point. An external 010996 2/9 DS1707/DS1708 MICROMONITOR BLOCK DIAGRAM Figure 1 IN - + T.C. REFERENCE DIGITAL SAMPLER NMI - + DIGITAL SAMPLER DIGITAL DELAY RST VCC RST PBRST LEVEL SENSE AND DEBOUNCE PUSHBUTTON RESET Figure 2 PBRST VCC DS1708 GND UPSTREAM SUPPLY VOLTAGE IN NC NMI RST RST RST 8051 P 5V INT0 PUSHBUTTON RESET CONTROLLED BY NMI Figure 3 PBRST RST UPSTREAM SUPPLY VOLTAGE 5V VCC DS1707 GND IN NC NMI RST RST P 010996 3/9 DS1707/DS1708 TIMING DIAGRAM: PUSHBUTTON RESET Figure 4 tPDLY PBRST tPB VIH VIL tRST RST VOH RST VOL NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE Figure 5 PBRST VSENSE VCC DS1708 GND R1 IN NMI NC TO P RST RST R2 V SENSE + R1 ) R2 x 1.25 R2 V MAX + V SENSE x V CC V TP Example: VSENSE = 4.70 volts at the trip point VCC = 3.3 volts 10K = R2 4.70 x 3.3 + 12.4 volts maximum 1.25 4.5 + R1 ) 10K x 1.25 10K R1 + 27.6KW Therefore: 010996 4/9 DS1707/DS1708 TIMING DIAGRAM: NON-MASKABLE INTERRUPT Figure 6 VIN > 1.25V VTP(MAX) VTP VTP(MIN) VTP(MIN) VTP(MAX) VTP tIPD NMI tIPD VOH VOL TIMING DIAGRAM: POWER DOWN Figure 7 tF VCC VCCTP(MAX) VCCTP VCCTP(MIN) tRPD RST VOH RST SLEWS WITH VCC RST VOL 010996 5/9 DS1707/DS1708 TIMING DIAGRAM: POWER UP Figure 8 tR VCCTP(MAX) VCCTP VCCTP(MIN) VCC tRPU RST VOH RST RST VOL RST 010996 6/9 DS1707/DS1708 ABSOLUTE MAXIMUM RATINGS* Voltage on VCC Pin Relative to Ground Voltage on I/O Relative to Ground Operating Temperature Storage Temperature Soldering Temperature -0.5V to +7.0V -0.5V to VCC +0.5V -40C to +85C -55C to +125C 260C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER Supply Voltage PBRST Input High Level PBRST Input Low Level SYMBOL VCC VIH VIL MIN 1.0 2.0 VCC-0.5 -0.03 TYP MAX 5.5 VCC+0.3 +0.5 (-40C to +85C) UNITS V V V NOTES 1 1, 3 1, 4 1 DC ELECTRICAL CHARACTERISTICS PARAMETER VCC Trip Point DS1707 VCC Trip Point DS1708 VCC Trip Point DS1708T VCC Trip Point DS1708S VCC Trip Point DS1708R Input Leakage Output Current @ 2.4 volts Output Current @ 0.4 volts Output Voltage Operating Current @ VCC < 5.5 volts Operating Current @ VCC < 3.6 volts IN Input Trip Point SYMBOL VCCTP VCCTP VCCTP VCCTP VCCTP IIL IOH IOL VOH ICC ICC VTP 1.20 1.25 10 MIN 4.50 4.25 3.00 2.85 2.55 -1.0 350 TYP 4.65 4.40 3.08 2.93 2.63 (-40C to +85C; VCC=1.2V to 5.5V) MAX 4.75 4.50 3.15 3.00 2.70 +1.0 UNITS V V V V V A A mA VCC-0.1 60 50 1.30 V A A V NOTES 1 1 1 1 1 2 3 3 3 5 5 1 CAPACITANCE PARAMETER Input Capacitance Output Capacitance SYMBOL CIN COUT MIN TYP MAX 5 7 UNITS pF pF (tA=25C) NOTES 010996 7/9 DS1707/DS1708 AC ELECTRICAL CHARACTERISTICS PARAMETER PBRST = VIL Reset Active Time VCC Detect to RST and RST VCC Slew Rate VCC Detect to RST and RST VCC Slew Rate PBRST Stable Low to RST and RST VIN Detect to NMI SYMBOL tPB tRST tRPD tF tRPU tR tPDLY tIPD 5 20 130 0 205 MIN 150 130 205 5 TYP (-40C to +85C; VCC=1.2V to 5.5V) MAX UNITS ns 285 8 ms s s 285 ms ns 250 8 ns s 7 6 7 NOTES NOTES: 1. All voltages are referenced to ground. 2. PBRST is internally pulled up to VCC with an internal impedance of 40K typical. 3. VCC 2.4 volts 4. VCC < 2.4 volts 5. Measured with outputs open and all inputs at VCC or ground. 6. tR = 5 s 7. Noise immunity - pulses < 2 s at VCCTP minimum will not cause a reset. 010996 8/9 DS1707/DS1708 PART MARKING CODES 8765 ABCD WWY 1234 8-PIN -SOP (118 MIL) A, B, C and D represents the device type and tolerance. ABCD 707_ 708_ 708R 708S 708T - - - - - DS1707 DS1708 DS1708R DS1708S DS1708T WWY represents the device manufacturing Work Week, and Year. 010996 9/9 |
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